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Solder surface tension is typically not strong enough to effect self-alignment of heavy ceramic components such as ceramic ball grid arrays (CBGAs) and ceramic column grid array (CCGAs) 473533 Intermetallic Compound Formation As previously discussed, intermetallic compound (IMC) formation occurs when the molten solder wets to metal surfaces of component leads and PWB pads IMC thickness is dependent on the temperature and time at or above liquidus The longer the solder is heated, the thicker the intermetallic layer, and thick IMCs result in brittle bond lines and degraded solder-joint reliability For this reason, overheating the circuit board during the spike should be avoided Time-above-liquidus (TAL) should be in accordance with the solder-paste manufacturer s recommendation, which is typically 30 to 60 sec, although there are no hard and fast rules for TAL.

A longer TAL for some components may be evidenced on large thermal mass boards that are slow to heat and heat unevenly In this case, some devices may overheat while others barely reach soldering temperature Similarly, some component or board metallurgies may be slow wetting and a longer TAL may be necessary Hot air solder leveling (HASL) or reflowed tin on copper bond pads possess a thin intermetallic layer between the applied surface finish and the pads During surface-mount technology (SMT) reflow, the addition of molten solder on top of this preexisting intermetallic layer will further its growth Therefore, the TAL should be limited to minimize IMC but sufficient for good solder wetting 473534 Materials Degradation During spike, board laminates, component bodies, etc, can degrade, so trials should be performed to ensure that all materials are compatible with chosen reflow parameters.

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Fig 83: Relative sizes of MEMS devices with the dimension in meters [4]

If connectors are being applied during SMT reflow, make sure that normal contact force has not been jeopardized by distortion or softening of the connector body during the spike Inspection of connector contact gaps before and after reflow and comparison to the connector manufacturer s specifications will provide clues as to whether the connector is truly compatible with the reflow process This is most important during the.

transition to Pb-free soldering due to the novelty of materials and questions of compatibility with higher reflow process temperatures 4736 Cooling The fourth and final stage is cooling It is here that the board s temperature is lowered beyond that of solder liquidus prior to exiting the oven Once again, recommendations for device heatingand-cooling ramp rates should be heeded Most electronic packaging and board materials are reluctant to shed heat quickly If the board is thick, the laminate, a relatively poor thermal conductor, will remain hot It must be cooled to below solder liquidus prior to exiting the oven to preclude dislodging of any soldered components or disturbing the solder-joint solidification process.

On the other hand, with the trends toward thinner circuit boards, slimmer components, and hot, fast-soldering profiles (to keep up with high-volume product demand), it is wise to ensure that the negative thermal ramp requirements are considered for this step also As mentioned previously, the solder paste manufacturer will provide recommended profile guidelines, but those are only a starting point The process engineer should optimize the reflow oven profile with product profile boards and analysis based on actual product runs Board profiling will be covered in a subsequent section Older textbooks and industrial references cite completeness of fillet formation and solder reflectivity as typical hallmarks of a good reflow process, but these are subjective measures that may not be true indicators of solder-joint quality As mentioned previously, overheated joints will be brittle although they may appear to be well wetted.

The charging of a capacitor with a constant current source is expressed with the equation: dv/dt = I/C Therefore, the time to charge a capacitor from 0 to 5 V is T = (C * 5) /I Plugging in the values, T 6:25 ms Thus the worst-case conversion time with this scheme is 625 ms This can be modified by changing the current provided by the current source The conversion time is long enough to extract a 10-bit or even 12-bit resolution ie, a 10- or 12-bit counter (either software or with the help of Timer0 or Timer1) can be filled up easily during the conversion time The resistor R4 is used to limit the capacitor discharge current to within safe values Without this resistor, the PB0 input would get damaged from the capacitor discharging a large transient pulse into the PB0 pin.

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